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Nov 17

Altium Designer 16.0.5


Altium Designer 16.0.5 | 3.1 Gb

Altium Limited, a global leader in Electronic Design Automation, native 3D PCB design systems (Altium Designer) and embedded software development toolkits (TASKING), has released the 16.0 version of its professional printed circuit board (PCB) and electronic system level design software, Altium Designer.

Altium Designer 16 demonstrates the continuing commitment by Altium to produce software and solutions that increase productivity and reduce user stress during challenging electronics design projects. It reflects Altium’s commitment to supporting customer success by delivering products that customers both want and need. In keeping with these objectives, Altium Designer 16 includes powerful new enhancements for designing the next generation of high-speed printed circuit boards, and keeping up with the leading trends in industry with support for new fabrication output standards.

Each release of Altium Designer continues the process of keeping you plugged into a continuous stream of new features, technologies and enhancements, designed to make it easier for you to create your next generation electronics designs.

Key feature highlights

– 3D STEP Model Generation in IPC Wizard
– Alternate Components in the BOM
– Panelization – Embedded Board Array Enhancements
– Improved Violation Feedback
– Design Rules Enhancements
– Differential Pair Routing Improvements
– PADS Logic Exporter Extension
– Single ‘Master’ Control to Work Offline
– Enhancements to PDF 3D Export
– Pin-Package Delay Support
– Net Color Synchronization
– Dynamic Display of Clearance Boundaries During Routing
– Add Hole Tolerance
– Smart Component Placement
– Technology Aware xSignals Wizard
– Improvements to Same-Net Clearance Rule
– Static Simulation Probes

6612 Added support for defining alternate, Vault-based parts in the BomDoc and BOM.
6816 Enables highlight of entire net in schematic and to ECO the schematic colors to the Layout
6264 Provided bi-directional communication between Altium Designer and Tasking Pin Mapper.
6371 Provided possibility to export projects to PADS Logic 5.0 using an extension.
6394 Static simulation probes allow you to interactively test voltage, power, and current, as well as help predict the behavior of your circuit.
6532 Provided ability to generate realistic 3D STEP models using IPC Compliant Footprint Wizard.
6568 Made improvements to ItemManager including: a refurbished grid, the ability to control data columns, the ability to choose the required PCB footprint, and the ability to cross-probe from ItemManager to component instances.
6836 The PCB Rules and Constraints Editor now creates user interface for each rule type and includes the option of entering complex query expressions for intricate cases.
7084 Adds DDR3 to xSignals Wizard. Creates xSignals for Address & Data lines. Also creates match length groups and tolerances.
7154 On completion of batch DRC process, the PCB Editor now automatically launches the PCB Rules And Violations panel, with improved function of the panel’s Select checkbox.
7192 Provided the ability to dynamically display the electrical clearance during interactive routing.
7255 Provided Push and Avoid Obstacles placement modes, ability to swap components, and dynamic alignment snapping for a component.
8083 Added support of IPC2581B output format.
7311 A new parameter has been added to specify the Hole Tolerance for Pads and Vias (BC:2405, BC:4748).
5323 Improve support for high-resolution screens (BC:1317).
6907 In order to achieve better matching, xSignals are now length tuned and this value is added to the length calculation (BC:5806).
6652 The Design Rules Editor now shows which objects within the design are affected by the rule(s).
7433 Added new tool “Swap components”, right-click on one of the selected components to access the command (BC:1020).
6203 Provided ability to see the white overlay in the 2D preview in the SCH Library if a 3D Body is placed over the pad of the footprint (BC:1291).
6214 The 3D Bodies of an Embedded Board Array that is mirrored now display properly in 3D Layout Mode (BC:3632, BC:4906).
6223 PcbDoc Assembly printouts that only include mechanical layers no longer include board cutout outlines (BC:3619, BC:2845).
6198 When Target Length mode is set to Manual, Differential Pair Length now obeys the Clip to Target Length option. (BC:5013)
6346 STEP and IDF exports no longer produce faceted edges in circular board cutouts (BC:365).
6445 IPC-2581 fabrication output now properly sets a Mirrored property for bottom-side mounted components (BC:5524).
5223 Fixed a bug where the white line grid sometimes appeared in the 3D print (BC:1808, BC:2189, BC:4657).
5225 It is now optional to remove net antennas during a loop removal (BC:2509).
6017 Toggle Fitted/Not Fitted works correctly for multi-part variants components (BC:4929).
6337 CADSTAR files with arcs and components now import to Altium Designer correctly (BC:4921).
6402 Print, PDF, and Assembly outputs now produce Pad objects that have shapes on mechanical layers (BC:4884).
6443 When connection lost to database and customer places component from DBLib or SVNDBLib there will be no parameters when component placed on schematic (BC:2824, BC:4889).
6573 Arcs export as OutputJob file correctly for IDF (BC:4541).
7351 Length tuning for differential pairs no longer creates violations with the board outline (BC:5626).
7498 Altium Designer no longer crashes while compiling multichannel design in a combination of a bus and a port (BC:2831).
8276 The ‘Always show drill symbol’ option now works correctly (BC:5902).
6579 It is now possible to specify footprint, while replacing component via Item Manager.
7027 Cross Probe is now available in Item Manager.
7058 DrillPair and PadType scope settings have been added for applicable Design Rules.
4217 Reduced time of ECO process for large and mid-large designs.
6522 Altium Designer performs correctly when editing a PCB with several board cutouts.
7063 Improved same-net clearance rule check.
7617 Provided ability to control component name during Ansoft files generation.
1351 ODB++ fabrication output has been corrected for cases where layer stack signal/plane layers have been reordered from their default positions.
4046 Off-grid warning no longer displays for components with alternate mode when the alternate display mode is not active.
4001 =Value can now be used for specifying Variant parameters in Assembly Drawing outputs.
6183 In the PCB Pad Via Templates panel, a dialog will now appear when using the Remove Unused Pad/Via button, with a list of unused Pad/Via Templates, allowing you to control which templates are removed from the Local Pad & Via Library.
6195 OpenSSL libraries in AD installation were upgraded from 1.0.1e to 1.0.2a.
6365 Update notification is now sent when pin-pairs are renamed.
6628 Solder mask from hole edge property can now be set in design rule.
6662 Changing a width of tracks included in a net using PCB Inspector no longer changes widths back to the original value.
6813 Locked option has been added to the Drill Table dialog.
6988 Provided a possibility to control network connectivity and work offline when necessary.
6998 Improved approximation for edges of small arcs.
7140 Component name is now configurable during IDF files generation.
7593 Traditional Chinese localization was updated.
7939 During length tuning, it is now possible to select which of the applicable Matched Length rules is to be obeyed in the Interactive Length Tuning dialog.
7947 Matched Lengths design rule has been simplified.
7948 All Matched Length rules that apply to current xSignals and Nets are now available in Interactive Length Tuning.
8003 IPC2581B is now supported.
8026 Added “Exclude outside” checkbox for 3D PDF exports to allow for exclusion of copper outside the regular PCB boundary.
8282 Japanese localization updated.
8548 Memory management on .Net side has been optimized.
8610 Resolved a portal login issue when using Windows 10.
8639 Provided the ability to copy Vault folder structure using sub-menu operations.
6216 STEP models with flex board no longer bend in 3D mode.
6220 Teardrops no longer ignore clearance constraints.
6199 Via dragging no longer causes the vias to disconnect from traces when 2 or more of the vias are on the same layer that are connected to three or more traces.
6200 Provided the ability to remove references to managed layer stack in the board planning mode.
6201 Keyword DrillType is now supported in the script language and filters.
6202 Vias that end in Mid Signal Layers no longer generate different output data in Gerber and ODB++ with same settings.
6205 Board-Cutout now displays correctly on Solder Mask and Coverlay Layers in 3D mode.
6206 Live Highlighting now functions correctly in Flipped Board View of the PCB.
6207 Resolved an issue that caused Editing Handles to be invisible when Fill was selected on a flipped board.
6208 Clearance check between a Testpoint and a Component-Body no longer creates an error message.
6211 Placing objects in Interactive Routing Mode is now enabled.
6212 Board information now shows correct Board Dimensions after switching from 2D to 3D.
6213 Arcs in Differential Pair no longer cause false Uncoupled-Length-Violations.
6217 When DRCing clearance between differential pair complements, the DRC process uses the Diff Pair Gap Rule instead of the Clearance Rule.
6219 The Check Nets Within Differential Pair option in the Matched Lengths design rule now checks for differences between the nets in each pair targeted by the rule scope.
6222 User defined track width (Shift + W) within a room with design rules now functions correctly.
6224 PCB Layout Editor’s STEP export of PcbDocs containing Embedded Board Arrays now more correctly represent the array.
6225 Snap Point Data that is determined by the Snap Grid Manager is now imported and exported correctly.
6226 Resolved an issue that caused additional layers to be created when generating Gerber from an OutputJob file.
7405 DRC violation descriptions have been made more comprehensive, to include critical information to aide the user as to why a violation has occurred.
6682 An accordion as part of Interactive Length Tuning, no longer moves double to the specified coordinates when using the Move Selection by XY feature.
6354 Resolved issue that caused tracks and components to be invisible when some video cards (ATI FireGL V7200, Radeon X1300/X1550 Series, Quadro K2000) with outdated drivers were used.
8736 The issue of special strings with delimiter characters not being interpreted correctly during assembly drawing generation has been resolved.
6124 Gerber Fabrication output now more comprehensively unionizes intersecting region shapes (mostly affects solder mask layers).
6500 The Export to Parasolid menu item now only appears with installation of the MCAD Co-Designer: SOLIDWORKS(R) extension.
6530 Error during output generation that displayed the message ‘Embedded boards not found’ was incorrect, the error was actually caused by an empty Design View. This has been resolved. (BC:5583).
6867 Resolved issue that caused Variant that is specified in the Outjob File to not be considered during PDF3D generation.
7527 Resolved issue that caused some pads to be missed after importing Mentor Expedition EE7.9.5.
8143 Resolved an issue that caused nets in child sheets that were defined as differential pairs to not find their mate.
8144 Resolved an issue that caused directives to “leak” beyond their scope.
8152 Resolved an issue that caused errors on multiple names when project is compiled.
2004 Exporting large PCBs to STEP files no longer cause exception errors.
3981 Project Variants now correctly work with multi-channel designs.
4035 Fixed issue with 3D PCB view when some tracks of the embedded board could be displayed on the wrong layers.
4249 Varied components that use string indirection, such as =Value, now correctly display the appropriate source parameter value on the PCB and in generated outputs.
4253 Removed grid lines from PCB 3D Print PDF outputs.
4392 PADS ASCII import no longer fails with “ini” Layer Mapping file used.
4540 =Value now evaluates correctly for Variant components in PCB PDF outputs.
4775 Allegro BRD files with custom pad shapes are now correctly imported to Altium Designer custom pad shapes.
4810 Fixed rounding in P-CAD imports.
5168 Fixed an issue with import of OrCAD DSN and MAX files taking a very long time. Polygons are now correctly filled as solid, and not hatched, if they are solid in the original design.
5632 Part attributes imported and present as text label in case they are visible.
5654 Mirroring of OLE objects preserves its state during saving and loading.
5735 The ODB++ output folder tree is now automatically zipped to the TGZ format, used by GENESIS-2000.
5953 OrCAD 16 parameters now import correctly.
5966 Fixed issue with CRLF token handling.
5979 The special string “CurrentTime” in the PDF settings for Output Jobs no longer causes an error.
6008 All components now display parameters in Schematic PDF output.
6009 Variant parameters are now reflected in the BOM table.
6010 Added the capability to scroll through the Violation Details window.
6011 Correct designators are now highlighted within the Bookmarks panel in the Assembly Drawing PDF document.
6012 Correct visibility appears when Permanent option is selected for Comment Primitive in Schematic Preferences (DXP >> Preferences >> Schematic >> Default Primitives).
6014 Circular keepout is now included when importing IDF files.
6015 Nets are now created for multi-part components with variations when pushing update from the Schematic to PCB.
6020 Exporting PCB using DXF/DWG Exporter no longer creates extra pads on an unused mechanical layer.
6021 Resolved an issue with placing multi-part components consisting of many sub-parts.
6023 Deleted polygons no longer reappear when opening schematic library.
6025 All schematic documents are now updated when “Update Current Template > All schematic documents in the current project” is selected.
6027 Exporting PCB documents to Specctra that contain Width rule for Net Classes now works correctly.
6028 “Open generated outputs” for “Fabrication Outputs – Report Board Stack” now works correctly for XLS-format.
6038 Correct scope is now generated for PCB Rules when ‘Blanket’ is used.
6055 FPGA constraint files can now be saved in a tabulated format which is compatible with Excel spreadsheets, making it easy to view and manage pin assignments.
6086 Top level sheet now imports correctly when importing multichannel hierarchical designs from OrCAD 16.6.
6087 Components and parameters that have duplicate items in the cache now import from OrCAD correctly.
6112 Interactive PinSwap no longer changes case of Net labels when pushing changes from PCB to Schematic.
6157 The Simulation Sources placement menu has been moved from the Utilities toolbar to the Mixed Sim toolbar. The Digital Device placement menu has been removed from the Utilities toolbar.
6158 Library panel behavior has been made consistent when opening Schematic Component Library, PCB Footprint Library, and PadVia Stack Library.
6176 The Polygon Pour object “Island Area Threshold” field in the PCB Inspector now behaves as expected.
6177 Room object move-drag operations no longer move objects that are integral to the physical board definition.
6227 Few unexpected crashes which occurred while working in Collaborate, Compare and Merge panel were fixed.
6228 The Link Location to Embedded Board Origin option now behaves more predictably on placement of Embedded Board Arrays.
6260 Multi-line Strings with embedded line-breaks now display properly after being saved in pre-15.1 releases of the PCB Layout Editor, provided they had not been otherwise modified.
6262 Resolved issue with wires being invisible if placed while holding a schematic component.
6263 Fixed an issue with order of libraries changing in the Library panel upon compilation of integrated library.
6276 Specific cases of PDF3D output of multi-line String objects have been corrected, where embedded line-breaks were not properly processed.
6326 PDF3D output now correctly adjusts the Z locations of 3D Bodies placed on Bottom-oriented layers of the PCB.
6344 Resolved an issue with remembering filter settings in “SCH List” between Altium Designer sessions.
6370 The Symbol Generator now correctly observes units for default pin lengths during component creation.
6373 Resolved issue with net list generation if simulation library contained non-literal characters.
6382 A Component placed on an internal signal layer and then updated from its PCB library now retains its proper rotation property.
6383 Several issues regarding multi-line String objects were resolved, allowing the text to retain its formatting.
6391 Resolved an issue with breaking layers stack during import of PCB Protel 99 SE designs.
6411 The PDF3D feature now considers the rotations of both pad and hole, for slot and square holes.
6429 Eagle files with polygons and rounded corners now import arcs correctly.
6497 The hole rotation angle for pads whose Solder Mask From The Hole Edge property is enabled, is now correctly ignored in generated IPC 2581 output.
6511 Resolved issue with displaying incorrect compiler violation related to PCB rules when generating BOM document.
6520 An issue with IPC 2581 generated output has been resolved, whereby drill drawings and guides with offset from center holes for octagonal and rounded rectangular pads, were positioned with additional shift from those holes’ centers.
6523 Resolved an issue with Schematic components missing parameters when importing from CADSTAR Schematic Library.
6525 Optimized memory consumption for DXP import, allowing to import DXF files without out of memory errors.
6559 The bounding rectangle for a special string now correctly fits the string’s width when the Convert Special Strings option is toggled.
6567 Resolved issue that caused a modified PCB file to appear as ‘non-modified’ after generating a DRC output.
6571 Special Strings are displayed correctly after changing the view configuration to inactive.
6575 DRC processing for Board Outline Clearance between complex pads and exterior board edges has been corrected.
6589 Altium Designer no longer crashes when two or more ports are added to multi-channel design simultaneously.
6595 Provided a way of Comment visibility to be taken from Schematic library when placing part from DBLib/SVNDblib by removing Comments field from the Field Mapping.
6625 When using the Create Primitives From Board Shape command’s Route Tool Outline option, you can now also select the Include Cutouts option to simulate tool paths that contour board cutout edges (BC:5185).
6663 Fixed incorrect component designators, pin numbers and part’s disappear in sheet symbol’ sheets.
6676 The IsEdgeConnector query keyword has been updated to support new high speed memory standards.
6706 DRC on attached design now behaves normally.
6734 Fixed redundant layer stacks import.
6742 Provided ability to add new members in new class in Differential Pair Editor.
6744 On placement of an Embedded Board Array, you are now notified of layer stack discrepancies.
6746 Embedded Board Array spacing options are improved. Along with corner-to-corner spacing, edge-to-edge spacing specification has been added.
6747 Graphical move-drag of an Embedded Board Array can now be performed with the board array’s location used as the anchor point to the cursor.
6748 The Embedded Board Array properties dialog now contains a status message that reports child and parent design layer stack compatibility.
6749 Objects selected in a child design of an Embedded Board Array no longer affect the display of the parent design.
6750 Embedded Board Arrays that contain SMD pads, and are also Mirrored, now produce valid ODB++ Fabrication output.
6751 Embedded Board Arrays now produce valid IPC-2581 Fabrication output.
6773 Resolved issue with BOM generation for fitted/not fitted variants components.
6784 A BOM report for a panelized PCB now outputs an error message to the BOM file.
6786 Editing text of String objects is now more intuitive due to refinements made to navigation within the associated properties dialog’s textbox.
6814 Restored ability to use ShowDialogWithCaption” function in the scripts.
6840 Nets comprised of very long routed lengths now have their length fields displayed properly throughout the PCB Editor’s dialogs and panels.
6864 Dragging a column to change the column order in the Variant Management dialog now produces the correct result.
6865 When a varied parameter is restored to its original base value, its display in output documentation is also now restored from green italics (varied) to the standard (unvaried) text display.
6884 Multi-line Strings that use Stroke font and are placed in child designs of Embedded Board Arrays, now produce correct Gerber output.
6903 Resolved issue with hard crash when importing some Eagle designs.
6956 Resolved an issue that caused errors with PADS Logic files with default fonts in NetLabels.
6975 Special Strings for alternate parts are fixed in PCB
6999 Staggered vias are no longer shown as through hole vias in the 3D PDF.
7003 Core Project options are now properly applied during compilation.
7037 Provided ability to generate CAM files for projects with more than 16 layers.
7112 Query text is now wrapped in PCB Rules Editor.
7126 Rotation is no longer detected for footprints when updated from PCB Library.
7127 Fixed issue when text of the pin number was overlapping graphics of pins for several italic fonts.
7183 The xSignals wizard no longer crashes when re-generating xSignals with different destination components.
7228 Option “Characteristic Impedance Driven Width” with different Stack Layouts no more causes errors while opening routing width rule, opening BOM or generate Composite Drawing to PDF.
7252 Altium Designer no longer generates artefacts for a folded board with more than 20 bending lines in 3D mode.
7257 Stacked vias (on consecutive layers) will by default drag-move together. Ctrl-Drag-Move moves them separately.
7385 Right click menu on toolbars and menus were disabled in Customize mode.
7397 A circular board shape generated from a STEP file is now aligned correctly after saving.
7406 Fixed issue in Pick and Place output, where parameters like “=Value” for variants with alternate parts were not resolved.
7461 Resolved an issue when the PCB release did not work with a 3D PDF export configured within an out job document.
7480 An issue has been resolved, whereby a via would sometimes jump away when routing an SMD pad and using an SMD To Corner rule.
7486 Inferred Schematic components created for component variations are filtered out from Navigation panel.
7564 Fixed regression issue with “Place>Directives>Specific No ERC” not picking compiler violation.
7627 Mentor Expedition Library now imports Paste Mask shapes correctly.
7761 Resolved issue with imported .BRD files that caused lines and arcs to be missed on some layers.
7833 The “Always repour polygons on modification” option now runs more smoothly when activated.
7835 Imported CADStar *.cpa files with format 2.12 that have track widths of 0 and ‘not specified’ now have correct track widths.
7949 3D bodies imported from Mentor Expedition Library now have same height as in original project.
7953 Round pastemask now imports from Mentor Expedition Library correctly.
8095 Components can now be selected and edited after Protel PCB import.
8096 Components now import correctly from xDxDesigner Importer.
8097 Resolved an issue that caused xDxDesinger Importer to cause incorrect GND-name mapping in the schematic document.
8137 Resolved an issue with xDxDesigner Importer skipping some hidden pins when importing Eagle design.
8211 Cancelling import/export of DXF/DWG files no longer causes a “Done” notification.
8225 Resolved an issue that caused TTF to not be interpreted when a PDF Printout was made by Outjob or SmartPDF.
8251 An Access Violation no longer occurs when there are no rules applicable to vias and primitives being shielded.
8254 PADS ASCII files now import correctly.
8365 Imported CADStar files (version format 2.7) that have track widths of 0 or ‘not specified’ now import correctly.
8534 Output files are now generated correctly when custom filename for DWG, STEP, BRD, and XLS files is “=CurrentTime”?.
8627 PDF3D now includes metallization of holes for plated pads and vias.
8750 SimView cursor information displayed in the Description will now correctly show units for waves Descriptionted in DB, Phase etc.
9002 Norwegian locale users running Windows 10 can now successfully use on-demand licenses.
9084 ShowHiddenRevision settings in the Vault Explorer are now preserved between restarts.
9220 An issue with incorrect dc currents in the PSpice JFET model have been fixed.
6030 Fixed sorting order for standalone license activations on ‘My Account’ page.
6549 An issue whereby parameters would be lost for Database Library components after connection to the MySQL server was lost, or connection to the DBLIB was broken after PC hibernation, has been resolved.
7468 Resolved issue with Layer positioning after importing P-CAD file.

About Altium Ltd.

Altium Limited is an Australian multinational software corporation that focuses on 3D PCB design, electronics design and embedded system development software.

Altium Designer, a unified electronics design environment links all aspects of smart systems design in a single application that is priced as affordable as possible. With this unique range of technologies Altium enables electronics designers to innovate, harness the latest devices and technologies, manage their projects across broad design ‘ecosystems’, and create connected, intelligent products.

Name: Altium Designer
Version: 16.0.5 (build 271)

Interface: english
OS: Windows 7even / 8
Size: 3.1 Gb


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