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Oct 02

Hotfix SPB16.60.076 (+ Hotfix SPB17.20.002)


Hotfix SPB16.60.076 (+ Hotfix SPB17.20.002) | 2.46 GB

Description: Updates for Cadence SPB / OrCAD16.60 . To install the latest Hotfix, it is not necessary to install all the previous ones, because cumulative update.

Torrent updated 06.09.2016.
Revised versions
DATE: 08-25-2016 HOTFIX VERSION: 076
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1614667 SIG_INTEGRITY SIMULATION Different results from Probe in SI Base and SigXp
1615601 GRE IFP_INTERACTIVE Delete Bundle then try to delete plan lines results in fatal error
1616540 SIP_LAYOUT DRC_CONSTRAINTS Same net DRC Line-to-Line reappearing after dyn shape update
DATE: 08-12-2016 HOTFIX VERSION: 075
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1461626 CONCEPT_HDL CREFER Cross-references shown to the same pin on different block instances though the signal names differ
1597000 CONCEPT_HDL INTERFACE_DESIGN Renaming NG does not work if> 1 segments have NG names
1602801 SIG_INTEGRITY OTHER Dielectric Warning message when opening SiP tool.
1606861 CONCEPT_HDL CORE Crash on Linux during Generate View
1608524 SIP_LAYOUT MANUFACTURING The Display Pin Text tool fails in the 16.6.073 version with a parseString error.
1609922 CONCEPT_HDL INFRA Launching Model Assignment crashes DE-HDL when the temp / edbDump.txt is read-only
1612108 ALLEGRO_EDITOR OTHER Netlist Import is crashing with the .SAV message.
DATE: 07-22-2016 HOTFIX VERSION: 074
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1423889 ALLEGRO_EDITOR EDIT_ETCH AiDT gets poor routing result
1547356 ALLEGRO_EDITOR EDIT_ETCH Results variations from ISR S034 to S066
1568912 RF_PCB BE_IFF_IMPORT Route keepouts can only be imported once
1574676 ORBITIO ALLEGRO_SIP_IF sip-> oio eco does not work properly
1580744 F2B PACKAGERXL ERROR (SPCODD-114): Duplicate physical part name NETSHORT found
1582628 ADW TDA When one user takes an update of physical object while the other user is still checking in the object, TDO crashes
1584719 TDA CORE Caching errors coming for a board ref project while doing Block update
1587157 CONCEPT_HDL CONSTRAINT_MGR reports conflicts on nets with VOLTAGE properties
1587498 CONCEPT_HDL INTERFACE_DESIGN Possibility to tap bus bits removed
1588786 ALLEGRO_EDITOR OTHER strip_design reports “Design corrupted message”
1589252 CONCEPT_HDL CORE Search options go to page origo not chosen component
1590538 CONCEPT_HDL DOC Open Archive shows unclear behavior
1590639 CONCEPT_HDL OTHER DEHDL crash when importing design
1590651 CONCEPT_HDL INTERFACE_DESIGN DEHDL duplicate NetGroups created in Interface Browser and CM
1594076 TDA CORE TDO is crashing on concurrent checkin when one of the user got blocks which are not modified
1594358 CONSTRAINT_MGR CONCEPT_HDL Enable hierarchical BOM fails for sub block with working variant view
1596780 ALLEGRO_EDITOR SKILL PCB Editor crashes after doing SRM update and save
1597153 F2B DESIGNVARI ERROR SPCODD-53 in Variant Editor
1597385 F2B DESIGNVARI Some 16.5 variant DNI parts are now appearing in 16.6 as X-OUT and some do not have X-OUT or DNI
1597413 SIG_EXPLORER SIMULATION SigXp crashes when simulating with via that was added to canvas
1598629 F2B PACKAGERXL Export Physical crashes
1599452 ALLEGRO_EDITOR ARTWORK Import Artwork, Mirror option does import pins or shapes.
1599950 SCM OTHER Adding the GND net to parts / pins takes a long time.
1600226 RF_PCB AUTO_PLACE Fail to auto-place RF group
1601281 ALLEGRO_EDITOR OTHER STEP model link gets corrupted with SKILL axlLoadSymbol
1601282 ALLEGRO_EDITOR OTHER Export Libraries will not export device files when there is a space in the folder name.
1602186 PCB_LIBRARIAN VERIFICATION con2con should work with PCB_Library_Manager license in 166 as 166 tools should work with 172 upgraded licenses
1602514 PCB_LIBRARIAN METADATA References to some primitives is missing in block metadata causing TDA errors for missing parts after join project
1602823 SIP_LAYOUT WIREBOND SiP Crashed during Add Wire command
1602955 ALLEGRO_EDITOR SHAPE Shape no DRC when there is a Route Keepout in base layer.
1604223 CONCEPT_HDL CORE ERROR: SPCOCD-553: Connectivity Server Error
1605310 TDA CORE TDA is crashing sometimes in the Join Project wizard

Version: SPB16.60 b076
Developer: Cadence
Developer website:
Bit depth: x64
Compatible with Win7: yes
Language: English
Crack: None
System requirements: Installed package Cadence SPB / OrCAD16.60 any previous Build.


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