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Apr 24

Xilinx Vivado Design Suite HLx Editions 2017.1 + LogiCORE IP

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Xilinx Vivado Design Suite HLx Editions 2017.1 + LogiCORE IP | 20.47 GB

Description: Development environment for FPGA, CPLD firm Xilinx.
During the installation phase of the Vivado Design Suite HLx Editions, the program will ask for the installation option:
Vivado HL WebPACK, Vivado HL Design Edition or Vivado HL System Edition.
Extras. The information: The main novelty of Vivado Design Suite 2017.1 is the inclusion of the option “partial reconfiguration” in the edition of System Edition and Design Edition.
Also in Vivado Design Suite 2017.1 support for new families of microcircuits is added:
• Kintex UltraScale +: XCKU3P, XCKU5P, XCKU9P;
• Virtex UltraScale +: XCVU3P;
• Zynq UltraScale + MPSoC: XCZU2EG / CG, XCZU3EG / CG, XCZU6EG / CG, XCZU9EZG / CG;
• Spartan-7: XC7S50.
Added new LogiCORE IP kernels:
• Memory
LPDDR3 for UltraScale / UltraScale + (<= 16Gb component) DDR4 3DS Components (32Gb MT40A4G8-083J) • Ethernet LPDDR3 for UltraScale / UltraScale + (<= 16Gb component) SGMII over LVDS for UltraScale / UltraScale + (Asynchronous and synchronous clocking mode) 10Gb Ethernet Subsystem (32b data path for reduced latency and utilization) 10Gb Ethernet MAC standalone (XAUI / RXAUI support) • Interconnect PCIe DMA Subsystem (Windows driver added) JESD204c for UltraScale / UltraScale + Aurora (25G support for UltraScale +, Transceiver outside of IP as an option) • Video HDMI (Linux drivers / size reduction) UHD-SDI (UltraScale + support) Video Processing Subsystem (Linux drivers) Video Mixer (Linux drivers / 10bpp and semi planar pixel support) MIPI (Linux drivers / 7 series support added) Also the changes have touched and the interface. It became simpler, more concise. Year / Release Date: 2017 Release: 2017.1 Developer: Xilinx Developer's site: http://www.xilinx.com Bit depth: 64bit Language: English Tabletka: present System requirements: OS: Linux (64 bit) / Windows 7, 10 (64 bit) Minimum Disk Space: 20 GB Recommended Physical RAM: 3 GB - 32 GB (depends on the family of chips) image

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